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time_adapter.h
1/*
2 * Copyright (c) 2024 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef _PICO_TIME_ADAPTER_H
8#define _PICO_TIME_ADAPTER_H
9
10#include "hardware/irq.h"
11#include "hardware/timer.h"
12#include "pico/assert.h"
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18#define TA_NUM_TIMERS NUM_GENERIC_TIMERS
19#define TA_NUM_TIMER_ALARMS NUM_ALARMS
20
21#define timer_hw_from_timer(t) ((timer_hw_t *)(t))
22
23static inline void ta_force_irq(alarm_pool_timer_t *timer, uint alarm_num) {
24 hw_set_bits(&timer_hw_from_timer(timer)->intf, 1u << alarm_num);
25}
26
27static inline void ta_clear_force_irq(alarm_pool_timer_t *timer, uint alarm_num) {
28 hw_clear_bits(&timer_hw_from_timer(timer)->intf, 1u << alarm_num);
29}
30
31static inline void ta_clear_irq(alarm_pool_timer_t *timer, uint alarm_num) {
32 timer_hw_from_timer(timer)->intr = 1u << alarm_num;
33}
34
35static inline alarm_pool_timer_t *ta_from_current_irq(uint *alarm_num) {
36 uint irq_num = __get_current_exception() - VTABLE_FIRST_IRQ;
37 alarm_pool_timer_t *timer = timer_get_instance(TIMER_NUM_FROM_IRQ(irq_num));
38 *alarm_num = TIMER_ALARM_NUM_FROM_IRQ(irq_num);
39 return timer;
40}
41
42static inline void ta_set_timeout(alarm_pool_timer_t *timer, uint alarm_num, int64_t target) {
43 // We never want to set the timeout to be later than our current one.
44 uint32_t current = timer_time_us_32(timer_hw_from_timer(timer));
45 uint32_t time_til_target = (uint32_t) target - current;
46 uint32_t time_til_alarm = timer_hw_from_timer(timer)->alarm[alarm_num] - current;
47 // Note: we are only dealing with the low 32 bits of the timer values,
48 // so there is some opportunity to make wrap-around errors.
49 //
50 // 1. If we just passed the alarm time, then time_til_alarm will be high, meaning we will
51 // likely do the update, but this is OK since the alarm will have just fired
52 // 2. If we just passed the target time, then time_til_target will be high, meaning we will
53 // likely not do the update, but this is OK since the caller who has the full 64 bits
54 // must check if the target time has passed when we return anyway to avoid races.
55 // 3. We should never leave here without an alarm being armed
56 if (time_til_target < time_til_alarm || (timer_hw_from_timer(timer)->armed & (1 << alarm_num)) == 0) {
57 timer_hw_from_timer(timer)->alarm[alarm_num] = (uint32_t) target;
58 }
59}
60
61static inline bool ta_wakes_up_on_or_before(alarm_pool_timer_t *timer, uint alarm_num, int64_t target) {
62 int64_t current = (int64_t)timer_time_us_64(timer_hw_from_timer(timer));
63 int64_t time_til_target = target - current;
64 uint32_t time_til_alarm = timer_hw_from_timer(timer)->alarm[alarm_num] - (uint32_t)current;
65 return time_til_alarm <= time_til_target;
66}
67
68static inline uint64_t ta_time_us_64(alarm_pool_timer_t *timer) {
69 return timer_time_us_64(timer_hw_from_timer(timer));
70}
71
72static inline void ta_enable_irq_handler(alarm_pool_timer_t *timer, uint alarm_num, irq_handler_t irq_handler) {
73 // disarm the timer
74 uint irq_num = timer_hardware_alarm_get_irq_num(timer, alarm_num);
75 timer_hw_from_timer(timer)->armed = 1u << alarm_num;
76 irq_set_exclusive_handler(irq_num, irq_handler);
77 irq_set_enabled(irq_num, true);
78 hw_set_bits(&timer_hw_from_timer(timer)->inte, 1u << alarm_num);
79}
80
81static inline void ta_disable_irq_handler(alarm_pool_timer_t *timer, uint alarm_num, irq_handler_t irq_handler) {
82 uint irq_num = timer_hardware_alarm_get_irq_num(timer, alarm_num);
83 // stop the alarm raising the interrupt
84 hw_clear_bits(&timer_hw_from_timer(timer)->inte, 1u << alarm_num);
85 // and stop this core taking one already pending
86 irq_set_enabled(irq_num, false);
87 // the handler cannot be running on this core now, so the rest is safe
88 timer_hw_from_timer(timer)->armed = 1u << alarm_num;
89 irq_remove_handler(irq_num, irq_handler);
90}
91
92static inline void ta_hardware_alarm_claim(alarm_pool_timer_t *timer, uint hardware_alaram_num) {
93 timer_hardware_alarm_claim(timer_hw_from_timer(timer), hardware_alaram_num);
94}
95
96static inline int ta_hardware_alarm_claim_unused(alarm_pool_timer_t *timer, bool required) {
97 return timer_hardware_alarm_claim_unused(timer, required);
98}
99
100static inline void ta_hardware_alarm_unclaim(alarm_pool_timer_t *timer, uint hardware_alaram_num) {
101 timer_hardware_alarm_unclaim(timer_hw_from_timer(timer), hardware_alaram_num);
102}
103
104static inline alarm_pool_timer_t *ta_timer_instance(uint timer_num) {
105 return timer_get_instance(timer_num);
106}
107
108static inline uint ta_timer_num(alarm_pool_timer_t *timer) {
109 return timer_get_index(timer_hw_from_timer(timer));
110}
111
112static inline alarm_pool_timer_t *ta_default_timer_instance(void) {
114}
115
116#ifdef __cplusplus
117}
118#endif
119
120#endif
static __force_inline void hw_set_bits(io_rw_32 *addr, uint32_t mask)
Atomically set the specified bits to 1 in a HW register.
Definition address_mapped.h:135
static __force_inline void hw_clear_bits(io_rw_32 *addr, uint32_t mask)
Atomically clear the specified bits to 0 in a HW register.
Definition address_mapped.h:145
void irq_set_enabled(uint num, bool enabled)
Enable or disable a specific interrupt on the executing core.
Definition irq.c:60
void(* irq_handler_t)(void)
Interrupt handler function type.
Definition irq.h:206
void irq_remove_handler(uint num, irq_handler_t handler)
Remove a specific interrupt handler for the given irq number on the executing core.
Definition irq.c:521
void irq_set_exclusive_handler(uint num, irq_handler_t handler)
Set an exclusive interrupt handler for an interrupt on the executing core.
Definition irq.c:267
static uint32_t timer_time_us_32(timer_hw_t *timer)
Return a 32 bit timestamp value in microseconds for a given timer instance.
Definition timer.h:202
static uint timer_hardware_alarm_get_irq_num(timer_hw_t *timer, uint alarm_num)
Returns the irq_num_t for the alarm interrupt from the given alarm on the given timer instance.
Definition timer.h:557
static uint timer_get_index(timer_hw_t *timer)
Returns the timer number for a timer instance.
Definition timer.h:579
int timer_hardware_alarm_claim_unused(timer_hw_t *timer, bool required)
cooperatively claim the use of a hardware alarm_num on the given timer instance
Definition timer.c:48
#define PICO_DEFAULT_TIMER_INSTANCE()
Returns the default timer instance on the platform based on the setting of PICO_DEFAULT_TIMER.
Definition timer.h:182
uint64_t timer_time_us_64(timer_hw_t *timer)
Return the current 64 bit timestamp value in microseconds for a given timer instance.
Definition timer.c:57
void timer_hardware_alarm_claim(timer_hw_t *timer, uint alarm_num)
cooperatively claim the use of this hardware alarm_num on the given timer instance
Definition timer.c:21
#define TIMER_NUM_FROM_IRQ(irq_num)
Returns the alarm number from an irq_num_t. See TIMER_INSTANCE_NUM_FROM_IRQ to get the alarm number.
Definition timer.h:147
void timer_hardware_alarm_unclaim(timer_hw_t *timer, uint alarm_num)
cooperatively release the claim on use of this hardware alarm_num on the given timer instance
Definition timer.c:30
static timer_hw_t * timer_get_instance(__unused uint timer_num)
Returns the timer instance with the given timer number.
Definition timer.h:590
#define TIMER_ALARM_NUM_FROM_IRQ(irq_num)
Returns the alarm number from an irq_num_t. See TIMER_INSTANCE_NUM_FROM_IRQ to get the timer instance...
Definition timer.h:129
static __force_inline uint __get_current_exception(void)
Get the current exception level on this core.
Definition platform.h:145